The solar industry faces two driving demands toward more widespread application: achieving increased efficiency, while lowering manufacturing costs. Since there is usually only a limited amount of space on a roof or land that can be dedicated to solar power installations, relatively minor increases in efficiency across arrays of hundreds of solar cells can add up to major competitive differentiation.
The efficiency of a solar cell, which can be defined as the ratio of the output electrical power of the solar cell to the incident radiant power from illumination by the sun, is limited by a number of factors. First, part of the incident sunlight is reflected away from the solar cell, instead of being absorbed and converted into electricity. For example, the surface of bare silicon reflects nearly 40% of incident light in the infrared region. This reflection loss is further exacerbated by the significant band gaps of materials used in solar cells being largely in the infrared region.
Secondly, even though an incident photon from the sunlight is absorbed and a charge carrier (electron or hole) is generated, recombination can occur before the charge carrier is utilized, thereby introducing recombination losses. In particular, for crystalline silicon (c-Si) cells, the surface represents the largest possible disturbance of the symmetry of the crystal lattice and therefore has a large density of dangling bonds, which are prone to various recombination channels, including radiative recombination, Auger recombination and Shockley-Read-Hall (SRH) recombination.
Thirdly, stable power output from a solar cell over an extended period of time (e.g., 20 years to achieve the expected return) may be impaired by potential induced degradation (PID), which occurs when a solar module's voltage potential and leakage current drive ion mobility within the module between the semiconductor material and other elements of the module (e.g. glass, mount and frame). One theory holds that ions driven by the voltage potential can accumulate on the negatively charged cell surface and interact with p-n junction in a negative manner, thereby reducing the performance of the solar cell.
Passivated emitter and rear cell (PERC), which includes a textured front surface, an anti-reflection coating (ARC) and passivation layers on both front and rear surfaces to suppress surface recombination, may address, at least in part, the efficiency concern for solar cells. The passivation layers in a PERC usually comprise a dielectric material. In industrial practice, the dielectric layer is conventionally formed by thermal oxidation in dry or wet oxygen ambient at temperatures ranging from 900° C. to 1200° C. Chemical vapor deposition (CVD) may operate at relatively lower temperatures, from 200° C. to 900° C., to achieve the coating. These high operation temperatures may induce a variety of problems, including high capital cost, low output or possible damages to the devices that are to be coated. Moreover, the ability of a PERC, in its conventional design, to withstand potential induced degradation (PID) remains to be seen.